In the process of producing semi-conductor devices, it takes many steps to form the desired devices. In the process of forming DRAM, for example, it takes many steps to form a capacitor and a transistor to build up a memory cell. To ensure the structures are correctly formed on the wafer by those steps, there are usually test structures on the wafers. During the steps, the correctness of the structures of the devices on the wafers is ensured by detecting the electric polarity or other features of the test structure.
FIG. 1 is a cross-sectional view of a test structure on a wafer using to form a DRAM in the prior art. In a substrate 100, a first deep trench capacitor 102 and a second deep trench capacitor 104 are formed. A first gate contact 110 and a second source/drain 118, 120 form a transistor. A second gate contact 116 and a second source/drain 126, 128 form another transistor. A first buried strap 122 is formed adjacent to the first deep trench capacitor 102. A second buried strap 124 is formed adjacent to the second deep trench capacitor 104. By means of a first contact 106 and a second contact 108, the threshold voltage Vt of the transistor is detected to check if the structure on the wafer is correct. For example, a drift formed by the contact of the trench and the gate may contribute to the decrease of threshold voltage Vt.
The active area AA1 in the structure of FIG. 1 is larger than the normal active area of a memory cell. It cannot reflect the actual situation of the active area of a memory cell, and requires to encompass more buried straps. When buried straps have out diffusion effect, the threshold voltage will be affected, too. Subsequently, when using the structure of FIG. 1 to test the structure of DRAMs, the problems on the wafer cannot be identified because too many variables are involved.